Giardino, Daniele, Department of Electronic Engineering, University of Rome Tor Vergata, Via Del Politecnico 1, Rome, 00133, Italy, Italy
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Vol 9, No 1 (2019) - Articles
FPGA Implementation of Hand-written Number Recognition Based on CNN
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Vol 9, No 4 (2019) - Articles
An Automatic AW-SOM VHDL IP-core Generator
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Vol 9, No 2 (2019) - Articles
A Feature Extractor IC for Acoustic Emission Non-destructive Testing
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Published by INSIGHT - Indonesian Society for Knowledge and Human Development